Euro DesignCon 2004

Euro DesignCon 2004 A New Design Approach for Processor-Like Reconfigurable Hardware

There are a growing number of reconfigurable architectures that combine the advantages of a hardwired implementation (performance, power consumption) with the advantages of a software solution (flexibility, time to market). Today, there are devices on the market that can be dynamically reconfigured at run-time within one clock cycle. But the benefits of these architectures can only be utilized ...

Euro DesignCon 2005 Evaluation of Temporal-Spatial Voltage Scaling for Processor- Like Reconfigurable Architectures

Supply voltage reduction leads to quadratic savings on power/energy consumption at the cost of longer execution delays. These days, this fact is largely used to convert the task idle time into power/energy gain on general-purpose and embedded processors. However, such voltage management requires often the use of extra software layers and intelligent algorithms and therefore an additional overhe...

Euro DesignCon 2005 A Flexible and Adaptive Pipelining Concept for Low Latency Interconnects

This paper describes a semi-hierarchical approach applied to the layout of a challenging multiprocessor ASIC. The ASIC contains several hundred single bit processors on a single chip in a 130 nm technology. The chip is targeted at the massive parallel processing of simple tasks that occur in huge quantities, for example, during hardware emulation. The paper focuses on the complex interconnect n...

Euro Area and US Recessions , 1970 – 2003

The perception of the euro in East Asia: International Vs Regional Currency